Bug Summary

File:hw/i386/pc_q35.c
Location:line 147, column 30
Description:Assigned value is garbage or undefined

Annotated Source Code

1/*
2 * Q35 chipset based pc system emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2009, 2010
6 * Isaku Yamahata <yamahata at valinux co jp>
7 * VA Linux Systems Japan K.K.
8 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
9 *
10 * This is based on pc.c, but heavily modified.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a copy
13 * of this software and associated documentation files (the "Software"), to deal
14 * in the Software without restriction, including without limitation the rights
15 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
16 * copies of the Software, and to permit persons to whom the Software is
17 * furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice shall be included in
20 * all copies or substantial portions of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
27 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 * THE SOFTWARE.
29 */
30#include "hw/hw.h"
31#include "hw/loader.h"
32#include "sysemu/arch_init.h"
33#include "hw/i2c/smbus.h"
34#include "hw/boards.h"
35#include "hw/timer/mc146818rtc.h"
36#include "hw/xen/xen.h"
37#include "sysemu/kvm.h"
38#include "hw/kvm/clock.h"
39#include "hw/pci-host/q35.h"
40#include "exec/address-spaces.h"
41#include "hw/i386/ich9.h"
42#include "hw/i386/smbios.h"
43#include "hw/ide/pci.h"
44#include "hw/ide/ahci.h"
45#include "hw/usb.h"
46#include "hw/cpu/icc_bus.h"
47
48/* ICH9 AHCI has 6 ports */
49#define MAX_SATA_PORTS6 6
50
51static bool_Bool has_pci_info;
52static bool_Bool has_acpi_build = true1;
53static bool_Bool smbios_type1_defaults = true1;
54
55/* PC hardware initialisation */
56static void pc_q35_init(QEMUMachineInitArgs *args)
57{
58 ram_addr_t below_4g_mem_size, above_4g_mem_size;
59 Q35PCIHost *q35_host;
60 PCIHostState *phb;
61 PCIBus *host_bus;
62 PCIDevice *lpc;
63 BusState *idebus[MAX_SATA_PORTS6];
64 ISADevice *rtc_state;
65 ISADevice *floppy;
66 MemoryRegion *pci_memory;
67 MemoryRegion *rom_memory;
68 MemoryRegion *ram_memory;
2
←
'ram_memory' declared without an initial value
→
69 GSIState *gsi_state;
70 ISABus *isa_bus;
71 int pci_enabled = 1;
72 qemu_irq *cpu_irq;
73 qemu_irq *gsi;
74 qemu_irq *i8259;
75 int i;
76 ICH9LPCState *ich9_lpc;
77 PCIDevice *ahci;
78 DeviceState *icc_bridge;
79 PcGuestInfo *guest_info;
80
81 if (xen_enabled() && xen_hvm_init(&ram_memory) != 0) {
82 fprintf(stderrstderr, "xen hardware virtual machine initialisation failed\n");
83 exit(1);
84 }
85
86 icc_bridge = qdev_create(NULL((void*)0), TYPE_ICC_BRIDGE"icc-bridge");
87 object_property_add_child(qdev_get_machine(), "icc-bridge",
88 OBJECT(icc_bridge)((Object *)(icc_bridge)), NULL((void*)0));
89
90 pc_cpus_init(args->cpu_model, icc_bridge);
91 pc_acpi_init("q35-acpi-dsdt.aml");
92
93 kvmclock_create();
94
95 if (args->ram_size >= 0xb0000000) {
3
←
Taking false branch
→
96 above_4g_mem_size = args->ram_size - 0xb0000000;
97 below_4g_mem_size = 0xb0000000;
98 } else {
99 above_4g_mem_size = 0;
100 below_4g_mem_size = args->ram_size;
101 }
102
103 /* pci enabled */
104 if (pci_enabled) {
4
←
Taking true branch
→
105 pci_memory = g_new(MemoryRegion, 1)((MemoryRegion *) g_malloc_n ((1), sizeof (MemoryRegion)));
106 memory_region_init(pci_memory, NULL((void*)0), "pci", UINT64_MAX(18446744073709551615UL));
107 rom_memory = pci_memory;
108 } else {
109 pci_memory = NULL((void*)0);
110 rom_memory = get_system_memory();
111 }
112
113 guest_info = pc_guest_info_init(below_4g_mem_size, above_4g_mem_size);
114 guest_info->has_pci_info = has_pci_info;
115 guest_info->isapc_ram_fw = false0;
116 guest_info->has_acpi_build = has_acpi_build;
117
118 if (smbios_type1_defaults) {
5
←
Assuming 'smbios_type1_defaults' is 0
→
6
←
Taking false branch
→
119 /* These values are guest ABI, do not change */
120 smbios_set_type1_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
121 args->machine->name);
122 }
123
124 /* allocate ram and load rom/bios */
125 if (!xen_enabled()) {
7
←
Taking false branch
→
126 pc_memory_init(get_system_memory(),
127 args->kernel_filename, args->kernel_cmdline,
128 args->initrd_filename,
129 below_4g_mem_size, above_4g_mem_size,
130 rom_memory, &ram_memory, guest_info);
131 }
132
133 /* irq lines */
134 gsi_state = g_malloc0(sizeof(*gsi_state));
135 if (kvm_irqchip_in_kernel()(kvm_kernel_irqchip)) {
8
←
Taking false branch
→
136 kvm_pc_setup_irq_routing(pci_enabled);
137 gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
138 GSI_NUM_PINS24);
139 } else {
140 gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS24);
141 }
142
143 /* create pci host bus */
144 q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE))((Q35PCIHost *)object_dynamic_cast_assert(((Object *)((qdev_create
(((void*)0), "q35-pcihost")))), ("q35-pcihost"), "/home/stefan/src/qemu/qemu.org/qemu/hw/i386/pc_q35.c"
, 144, __func__));
145
146 object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host)((Object *)(q35_host)), NULL((void*)0));
147 q35_host->mch.ram_memory = ram_memory;
9
←
Assigned value is garbage or undefined
148 q35_host->mch.pci_address_space = pci_memory;
149 q35_host->mch.system_memory = get_system_memory();
150 q35_host->mch.address_space_io = get_system_io();
151 q35_host->mch.below_4g_mem_size = below_4g_mem_size;
152 q35_host->mch.above_4g_mem_size = above_4g_mem_size;
153 q35_host->mch.guest_info = guest_info;
154 /* pci */
155 qdev_init_nofail(DEVICE(q35_host)((DeviceState *)object_dynamic_cast_assert(((Object *)((q35_host
))), ("device"), "/home/stefan/src/qemu/qemu.org/qemu/hw/i386/pc_q35.c"
, 155, __func__)));
156 phb = PCI_HOST_BRIDGE(q35_host)((PCIHostState *)object_dynamic_cast_assert(((Object *)((q35_host
))), ("pci-host-bridge"), "/home/stefan/src/qemu/qemu.org/qemu/hw/i386/pc_q35.c"
, 156, __func__));
157 host_bus = phb->bus;
158 /* create ISA bus */
159 lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV,((((31) & 0x1f) << 3) | ((0) & 0x07))
160 ICH9_LPC_FUNC)((((31) & 0x1f) << 3) | ((0) & 0x07)), true1,
161 TYPE_ICH9_LPC_DEVICE"ICH9 LPC");
162 ich9_lpc = ICH9_LPC_DEVICE(lpc)((ICH9LPCState *)object_dynamic_cast_assert(((Object *)((lpc)
)), ("ICH9 LPC"), "/home/stefan/src/qemu/qemu.org/qemu/hw/i386/pc_q35.c"
, 162, __func__));
163 ich9_lpc->pic = gsi;
164 ich9_lpc->ioapic = gsi_state->ioapic_irq;
165 pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
166 ICH9_LPC_NB_PIRQS8);
167 pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
168 isa_bus = ich9_lpc->isa_bus;
169
170 /*end early*/
171 isa_bus_irqs(isa_bus, gsi);
172
173 if (kvm_irqchip_in_kernel()(kvm_kernel_irqchip)) {
174 i8259 = kvm_i8259_init(isa_bus);
175 } else if (xen_enabled()) {
176 i8259 = xen_interrupt_controller_init();
177 } else {
178 cpu_irq = pc_allocate_cpu_irq();
179 i8259 = i8259_init(isa_bus, cpu_irq[0]);
180 }
181
182 for (i = 0; i < ISA_NUM_IRQS16; i++) {
183 gsi_state->i8259_irq[i] = i8259[i];
184 }
185 if (pci_enabled) {
186 ioapic_init_gsi(gsi_state, NULL((void*)0));
187 }
188 qdev_init_nofail(icc_bridge);
189
190 pc_register_ferr_irq(gsi[13]);
191
192 /* init basic PC hardware */
193 pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, false0, 0xff0104);
194
195 /* connect pm stuff to lpc */
196 ich9_lpc_pm_init(lpc);
197
198 /* ahci and SATA device, for q35 1 ahci controller is built-in */
199 ahci = pci_create_simple_multifunction(host_bus,
200 PCI_DEVFN(ICH9_SATA1_DEV,((((31) & 0x1f) << 3) | ((2) & 0x07))
201 ICH9_SATA1_FUNC)((((31) & 0x1f) << 3) | ((2) & 0x07)),
202 true1, "ich9-ahci");
203 idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
204 idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
205
206 if (usb_enabled(false0)) {
207 /* Should we create 6 UHCI according to ich9 spec? */
208 ehci_create_ich9_with_companions(host_bus, 0x1d);
209 }
210
211 /* TODO: Populate SPD eeprom data. */
212 smbus_eeprom_init(ich9_smb_init(host_bus,
213 PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC)((((31) & 0x1f) << 3) | ((3) & 0x07)),
214 0xb100),
215 8, NULL((void*)0), 0);
216
217 pc_cmos_init(below_4g_mem_size, above_4g_mem_size, args->boot_order,
218 floppy, idebus[0], idebus[1], rtc_state);
219
220 /* the rest devices to which pci devfn is automatically assigned */
221 pc_vga_init(isa_bus, host_bus);
222 pc_nic_init(isa_bus, host_bus);
223 if (pci_enabled) {
224 pc_pci_device_init(host_bus);
225 }
226}
227
228static void pc_compat_1_7(QEMUMachineInitArgs *args)
229{
230 smbios_type1_defaults = false0;
231}
232
233static void pc_compat_1_6(QEMUMachineInitArgs *args)
234{
235 pc_compat_1_7(args);
236 has_pci_info = false0;
237 rom_file_in_ram = false0;
238 has_acpi_build = false0;
239}
240
241static void pc_compat_1_5(QEMUMachineInitArgs *args)
242{
243 pc_compat_1_6(args);
244}
245
246static void pc_compat_1_4(QEMUMachineInitArgs *args)
247{
248 pc_compat_1_5(args);
249 x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE(1 << 22));
250 x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ(1 << 1));
251}
252
253static void pc_q35_init_1_7(QEMUMachineInitArgs *args)
254{
255 pc_compat_1_7(args);
256 pc_q35_init(args);
257}
258
259static void pc_q35_init_1_6(QEMUMachineInitArgs *args)
260{
261 pc_compat_1_6(args);
262 pc_q35_init(args);
263}
264
265static void pc_q35_init_1_5(QEMUMachineInitArgs *args)
266{
267 pc_compat_1_5(args);
268 pc_q35_init(args);
269}
270
271static void pc_q35_init_1_4(QEMUMachineInitArgs *args)
272{
273 pc_compat_1_4(args);
274 pc_q35_init(args);
1
Calling 'pc_q35_init'
→
275}
276
277#define PC_Q35_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu \
278 PC_DEFAULT_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, \
279 .desc = "Standard PC (Q35 + ICH9, 2009)", \
280 .hot_add_cpu = pc_hot_add_cpu
281
282#define PC_Q35_2_0_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu, .default_machine_opts = "firmware=bios-256k.bin" \
283 PC_Q35_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu, \
284 .default_machine_opts = "firmware=bios-256k.bin"
285
286static QEMUMachine pc_q35_machine_v2_0 = {
287 PC_Q35_2_0_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu, .default_machine_opts = "firmware=bios-256k.bin",
288 .name = "pc-q35-2.0",
289 .alias = "q35",
290 .init = pc_q35_init,
291};
292
293#define PC_Q35_1_7_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu PC_Q35_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu
294
295static QEMUMachine pc_q35_machine_v1_7 = {
296 PC_Q35_1_7_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu,
297 .name = "pc-q35-1.7",
298 .init = pc_q35_init_1_7,
299 .compat_props = (GlobalProperty[]) {
300 PC_Q35_COMPAT_1_7{ .driver = "hpet", .property = "hpet-intcap", .value = "4", },
301 { /* end of list */ }
302 },
303};
304
305#define PC_Q35_1_6_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu PC_Q35_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu
306
307static QEMUMachine pc_q35_machine_v1_6 = {
308 PC_Q35_1_6_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu,
309 .name = "pc-q35-1.6",
310 .init = pc_q35_init_1_6,
311 .compat_props = (GlobalProperty[]) {
312 PC_Q35_COMPAT_1_6{ .driver = "e1000", .property = "mitigation", .value = "off"
, },{ .driver = "qemu64-" "x86_64-cpu", .property = "model", .
value = "2", },{ .driver = "qemu32-" "x86_64-cpu", .property =
"model", .value = "3", },{ .driver = "i440FX-pcihost", .property
= "short_root_bus", .value = "1", },{ .driver = "q35-pcihost"
, .property = "short_root_bus", .value = "1", }, { .driver = "hpet"
, .property = "hpet-intcap", .value = "4", },
313 { /* end of list */ }
314 },
315};
316
317static QEMUMachine pc_q35_machine_v1_5 = {
318 PC_Q35_1_6_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu,
319 .name = "pc-q35-1.5",
320 .init = pc_q35_init_1_5,
321 .compat_props = (GlobalProperty[]) {
322 PC_Q35_COMPAT_1_5{ .driver = "e1000", .property = "mitigation", .value = "off"
, },{ .driver = "qemu64-" "x86_64-cpu", .property = "model", .
value = "2", },{ .driver = "qemu32-" "x86_64-cpu", .property =
"model", .value = "3", },{ .driver = "i440FX-pcihost", .property
= "short_root_bus", .value = "1", },{ .driver = "q35-pcihost"
, .property = "short_root_bus", .value = "1", }, { .driver = "Conroe-"
"x86_64-cpu", .property = "model", .value = "2", },{ .driver
= "Conroe-" "x86_64-cpu", .property = "level", .value = "2",
},{ .driver = "Penryn-" "x86_64-cpu", .property = "model", .
value = "2", },{ .driver = "Penryn-" "x86_64-cpu", .property =
"level", .value = "2", },{ .driver = "Nehalem-" "x86_64-cpu"
, .property = "model", .value = "2", },{ .driver = "Nehalem-"
"x86_64-cpu", .property = "level", .value = "2", },{ .driver
= "virtio-net-pci", .property = "any_layout", .value = "off"
, },{ .driver = "x86_64-cpu", .property = "pmu", .value = "on"
, },{ .driver = "i440FX-pcihost", .property = "short_root_bus"
, .value = "0", },{ .driver = "q35-pcihost", .property = "short_root_bus"
, .value = "0", }, { .driver = "e1000", .property = "mitigation"
, .value = "off", },{ .driver = "qemu64-" "x86_64-cpu", .property
= "model", .value = "2", },{ .driver = "qemu32-" "x86_64-cpu"
, .property = "model", .value = "3", },{ .driver = "i440FX-pcihost"
, .property = "short_root_bus", .value = "1", },{ .driver = "q35-pcihost"
, .property = "short_root_bus", .value = "1", }, { .driver = "hpet"
, .property = "hpet-intcap", .value = "4", },
323 { /* end of list */ }
324 },
325};
326
327#define PC_Q35_1_4_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu, .hot_add_cpu = ((void*)0) \
328 PC_Q35_1_6_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu, \
329 .hot_add_cpu = NULL((void*)0)
330
331static QEMUMachine pc_q35_machine_v1_4 = {
332 PC_Q35_1_4_MACHINE_OPTIONS.default_boot_order = "cad", .hot_add_cpu = pc_hot_add_cpu, .
max_cpus = 255, .desc = "Standard PC (Q35 + ICH9, 2009)", .hot_add_cpu
= pc_hot_add_cpu, .hot_add_cpu = ((void*)0),
333 .name = "pc-q35-1.4",
334 .init = pc_q35_init_1_4,
335 .compat_props = (GlobalProperty[]) {
336 PC_COMPAT_1_4{ .driver = "e1000", .property = "mitigation", .value = "off"
, },{ .driver = "qemu64-" "x86_64-cpu", .property = "model", .
value = "2", },{ .driver = "qemu32-" "x86_64-cpu", .property =
"model", .value = "3", },{ .driver = "i440FX-pcihost", .property
= "short_root_bus", .value = "1", },{ .driver = "q35-pcihost"
, .property = "short_root_bus", .value = "1", }, { .driver = "Conroe-"
"x86_64-cpu", .property = "model", .value = "2", },{ .driver
= "Conroe-" "x86_64-cpu", .property = "level", .value = "2",
},{ .driver = "Penryn-" "x86_64-cpu", .property = "model", .
value = "2", },{ .driver = "Penryn-" "x86_64-cpu", .property =
"level", .value = "2", },{ .driver = "Nehalem-" "x86_64-cpu"
, .property = "model", .value = "2", },{ .driver = "Nehalem-"
"x86_64-cpu", .property = "level", .value = "2", },{ .driver
= "virtio-net-pci", .property = "any_layout", .value = "off"
, },{ .driver = "x86_64-cpu", .property = "pmu", .value = "on"
, },{ .driver = "i440FX-pcihost", .property = "short_root_bus"
, .value = "0", },{ .driver = "q35-pcihost", .property = "short_root_bus"
, .value = "0", }, { .driver = "scsi-hd", .property = "discard_granularity"
, .value = "0", },{ .driver = "scsi-cd", .property = "discard_granularity"
, .value = "0", },{ .driver = "scsi-disk", .property = "discard_granularity"
, .value = "0", },{ .driver = "ide-hd", .property = "discard_granularity"
, .value = "0", },{ .driver = "ide-cd", .property = "discard_granularity"
, .value = "0", },{ .driver = "ide-drive", .property = "discard_granularity"
, .value = "0", },{ .driver = "virtio-blk-pci", .property = "discard_granularity"
, .value = "0", },{ .driver = "virtio-serial-pci", .property =
"vectors", .value = "0xFFFFFFFF", },{ .driver = "virtio-net-pci"
, .property = "ctrl_guest_offloads", .value = "off", },{ .driver
= "e1000", .property = "romfile", .value = "pxe-e1000.rom", }
,{ .driver = "ne2k_pci", .property = "romfile", .value = "pxe-ne2k_pci.rom"
, },{ .driver = "pcnet", .property = "romfile", .value = "pxe-pcnet.rom"
, },{ .driver = "rtl8139", .property = "romfile", .value = "pxe-rtl8139.rom"
, },{ .driver = "virtio-net-pci", .property = "romfile", .value
= "pxe-virtio.rom", },{ .driver = "486-" "x86_64-cpu", .property
= "model", .value = "0", },
337 { /* end of list */ }
338 },
339};
340
341static void pc_q35_machine_init(void)
342{
343 qemu_register_machine(&pc_q35_machine_v2_0);
344 qemu_register_machine(&pc_q35_machine_v1_7);
345 qemu_register_machine(&pc_q35_machine_v1_6);
346 qemu_register_machine(&pc_q35_machine_v1_5);
347 qemu_register_machine(&pc_q35_machine_v1_4);
348}
349
350machine_init(pc_q35_machine_init)static void __attribute__((constructor)) do_qemu_init_pc_q35_machine_init
(void) { register_module_init(pc_q35_machine_init, MODULE_INIT_MACHINE
); };