Bug Summary

File:hw/mips/mips_mipssim.c
Location:line 84, column 5
Description:Value stored to 'initrd_offset' is never read

Annotated Source Code

1/*
2 * QEMU/mipssim emulation
3 *
4 * Emulates a very simple machine model similar to the one used by the
5 * proprietary MIPS emulator.
6 *
7 * Copyright (c) 2007 Thiemo Seufer
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
26 */
27#include "hw/hw.h"
28#include "hw/mips/mips.h"
29#include "hw/mips/cpudevs.h"
30#include "hw/char/serial.h"
31#include "hw/isa/isa.h"
32#include "net/net.h"
33#include "sysemu/sysemu.h"
34#include "hw/boards.h"
35#include "hw/mips/bios.h"
36#include "hw/loader.h"
37#include "elf.h"
38#include "hw/sysbus.h"
39#include "exec/address-spaces.h"
40#include "qemu/error-report.h"
41#include "sysemu/qtest.h"
42
43static struct _loaderparams {
44 int ram_size;
45 const char *kernel_filename;
46 const char *kernel_cmdline;
47 const char *initrd_filename;
48} loaderparams;
49
50typedef struct ResetData {
51 MIPSCPU *cpu;
52 uint64_t vector;
53} ResetData;
54
55static int64_t load_kernel(void)
56{
57 int64_t entry, kernel_high;
58 long kernel_size;
59 long initrd_size;
60 ram_addr_t initrd_offset;
61 int big_endian;
62
63#ifdef TARGET_WORDS_BIGENDIAN
64 big_endian = 1;
65#else
66 big_endian = 0;
67#endif
68
69 kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
70 NULL((void*)0), (uint64_t *)&entry, NULL((void*)0),
71 (uint64_t *)&kernel_high, big_endian,
72 ELF_MACHINE8, 1);
73 if (kernel_size >= 0) {
74 if ((entry & ~0x7fffffffULL) == 0x80000000)
75 entry = (int32_t)entry;
76 } else {
77 fprintf(stderrstderr, "qemu: could not load kernel '%s'\n",
78 loaderparams.kernel_filename);
79 exit(1);
80 }
81
82 /* load initrd */
83 initrd_size = 0;
84 initrd_offset = 0;
Value stored to 'initrd_offset' is never read
85 if (loaderparams.initrd_filename) {
86 initrd_size = get_image_size (loaderparams.initrd_filename);
87 if (initrd_size > 0) {
88 initrd_offset = (kernel_high + ~INITRD_PAGE_MASK(~((1 << 16) - 1))) & INITRD_PAGE_MASK(~((1 << 16) - 1));
89 if (initrd_offset + initrd_size > loaderparams.ram_size) {
90 fprintf(stderrstderr,
91 "qemu: memory too small for initial ram disk '%s'\n",
92 loaderparams.initrd_filename);
93 exit(1);
94 }
95 initrd_size = load_image_targphys(loaderparams.initrd_filename,
96 initrd_offset, loaderparams.ram_size - initrd_offset);
97 }
98 if (initrd_size == (target_ulong) -1) {
99 fprintf(stderrstderr, "qemu: could not load initial ram disk '%s'\n",
100 loaderparams.initrd_filename);
101 exit(1);
102 }
103 }
104 return entry;
105}
106
107static void main_cpu_reset(void *opaque)
108{
109 ResetData *s = (ResetData *)opaque;
110 CPUMIPSState *env = &s->cpu->env;
111
112 cpu_reset(CPU(s->cpu)((CPUState *)object_dynamic_cast_assert(((Object *)((s->cpu
))), ("cpu"), "/home/stefan/src/qemu/qemu.org/qemu/hw/mips/mips_mipssim.c"
, 112, __func__)));
113 env->active_tc.PC = s->vector & ~(target_ulong)1;
114 if (s->vector & 1) {
115 env->hflags |= MIPS_HFLAG_M160x00400;
116 }
117}
118
119static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd)
120{
121 DeviceState *dev;
122 SysBusDevice *s;
123
124 dev = qdev_create(NULL((void*)0), "mipsnet");
125 qdev_set_nic_properties(dev, nd);
126 qdev_init_nofail(dev);
127
128 s = SYS_BUS_DEVICE(dev)((SysBusDevice *)object_dynamic_cast_assert(((Object *)((dev)
)), ("sys-bus-device"), "/home/stefan/src/qemu/qemu.org/qemu/hw/mips/mips_mipssim.c"
, 128, __func__));
129 sysbus_connect_irq(s, 0, irq);
130 memory_region_add_subregion(get_system_io(),
131 base,
132 sysbus_mmio_get_region(s, 0));
133}
134
135static void
136mips_mipssim_init(QEMUMachineInitArgs *args)
137{
138 ram_addr_t ram_size = args->ram_size;
139 const char *cpu_model = args->cpu_model;
140 const char *kernel_filename = args->kernel_filename;
141 const char *kernel_cmdline = args->kernel_cmdline;
142 const char *initrd_filename = args->initrd_filename;
143 char *filename;
144 MemoryRegion *address_space_mem = get_system_memory();
145 MemoryRegion *isa = g_new(MemoryRegion, 1)((MemoryRegion *) g_malloc_n ((1), sizeof (MemoryRegion)));
146 MemoryRegion *ram = g_new(MemoryRegion, 1)((MemoryRegion *) g_malloc_n ((1), sizeof (MemoryRegion)));
147 MemoryRegion *bios = g_new(MemoryRegion, 1)((MemoryRegion *) g_malloc_n ((1), sizeof (MemoryRegion)));
148 MIPSCPU *cpu;
149 CPUMIPSState *env;
150 ResetData *reset_info;
151 int bios_size;
152
153 /* Init CPUs. */
154 if (cpu_model == NULL((void*)0)) {
155#ifdef TARGET_MIPS641
156 cpu_model = "5Kf";
157#else
158 cpu_model = "24Kf";
159#endif
160 }
161 cpu = cpu_mips_init(cpu_model);
162 if (cpu == NULL((void*)0)) {
163 fprintf(stderrstderr, "Unable to find CPU definition\n");
164 exit(1);
165 }
166 env = &cpu->env;
167
168 reset_info = g_malloc0(sizeof(ResetData));
169 reset_info->cpu = cpu;
170 reset_info->vector = env->active_tc.PC;
171 qemu_register_reset(main_cpu_reset, reset_info);
172
173 /* Allocate RAM. */
174 memory_region_init_ram(ram, NULL((void*)0), "mips_mipssim.ram", ram_size);
175 vmstate_register_ram_global(ram);
176 memory_region_init_ram(bios, NULL((void*)0), "mips_mipssim.bios", BIOS_SIZE(4 * 1024 * 1024));
177 vmstate_register_ram_global(bios);
178 memory_region_set_readonly(bios, true1);
179
180 memory_region_add_subregion(address_space_mem, 0, ram);
181
182 /* Map the BIOS / boot exception handler. */
183 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
184 /* Load a BIOS / boot exception handler image. */
185 if (bios_name == NULL((void*)0))
186 bios_name = BIOS_FILENAME"mipsel_bios.bin";
187 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS0, bios_name);
188 if (filename) {
189 bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE(4 * 1024 * 1024));
190 g_free(filename);
191 } else {
192 bios_size = -1;
193 }
194 if ((bios_size < 0 || bios_size > BIOS_SIZE(4 * 1024 * 1024)) &&
195 !kernel_filename && !qtest_enabled()) {
196 /* Bail out if we have neither a kernel image nor boot vector code. */
197 error_report("Could not load MIPS bios '%s', and no "
198 "-kernel argument was specified", filename);
199 exit(1);
200 } else {
201 /* We have a boot vector start address. */
202 env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
203 }
204
205 if (kernel_filename) {
206 loaderparams.ram_size = ram_size;
207 loaderparams.kernel_filename = kernel_filename;
208 loaderparams.kernel_cmdline = kernel_cmdline;
209 loaderparams.initrd_filename = initrd_filename;
210 reset_info->vector = load_kernel();
211 }
212
213 /* Init CPU internal devices. */
214 cpu_mips_irq_init_cpu(env);
215 cpu_mips_clock_init(env);
216
217 /* Register 64 KB of ISA IO space at 0x1fd00000. */
218 memory_region_init_alias(isa, NULL((void*)0), "isa_mmio",
219 get_system_io(), 0, 0x00010000);
220 memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa);
221
222 /* A single 16450 sits at offset 0x3f8. It is attached to
223 MIPS CPU INT2, which is interrupt 4. */
224 if (serial_hds[0])
225 serial_init(0x3f8, env->irq[4], 115200, serial_hds[0],
226 get_system_io());
227
228 if (nd_table[0].used)
229 /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
230 mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
231}
232
233static QEMUMachine mips_mipssim_machine = {
234 .name = "mipssim",
235 .desc = "MIPS MIPSsim platform",
236 .init = mips_mipssim_init,
237};
238
239static void mips_mipssim_machine_init(void)
240{
241 qemu_register_machine(&mips_mipssim_machine);
242}
243
244machine_init(mips_mipssim_machine_init)static void __attribute__((constructor)) do_qemu_init_mips_mipssim_machine_init
(void) { register_module_init(mips_mipssim_machine_init, MODULE_INIT_MACHINE
); };